(a) Field of the Invention
The present invention relates to a three phase brushless direct current (BLDC) motor. More specifically, the present invention relates to a drive circuit of a three phase BLDC motor.
(b) Description of the Related Art
A conventional three phase BLDC motor comprises a rotor including a plurality of magnetic poles, and a stator including U, V and W phase coils. The three phase BLDC motor supplies current to each phase of the coil of the stator, and generates a magnetic field in the coil using this current to rotate the rotor. In order for the three phase BLDC motor to supply the current to the three phase coils and rotate the motor, a driving circuit is necessary. The driving circuit comprises a first switch unit including a plurality of switches positioned between a voltage source and each coil, and an inverter including a second switch unit including a plurality of switches positioned between each coil and the ground.
FIG. 1 shows a block diagram of a conventional driving circuit of a general three phase BLDC motor, including the inverter. As shown, the three phase motor driving circuit comprises three phase coils U, V and W, an inverter 1, a first transistor driver 2, a second transistor driver 3, a driving controller 4, a current sensing resistor Rsen and an error amplifier AMP.
Here, three blocks 11, 12 and 13 that supply the current to the three phase coils U, V and W according to control signals of the first transistor driver 2 correspond to the first switch unit, and three blocks 14, 15 and 16 that supply to the current sensing resistor Rsen the current flowing through the three phase coils U, V and W according to control signals of the second transistor driver 3 correspond to the second switch unit.
The first and second switch units of the inverter comprise transistors and selectively turn on each transistor so as to supply to the three phase coils the current, with a phase difference of 120xc2x0 .
Therefore, the current is alternately supplied to each coil of the three phase coils U, V and W, and the current forms a voltage Vsen through one of the blocks 14, 15 and 16 by way of the current sensing resistor Rsen.
The voltage Vsen influences the error amplifier AMP, driving controller 4, and first and second transistor drivers 2 and 3, forming a feedback circuit, and thereby the voltage Vsen becomes identical with a non-inverting voltage Vref of the error amplifier AMP.
The motor normally operates through the above-noted operations. However, since the blocks 11, 12 and 13 of the first switch unit are comprised of transistors, when the transistors are turned on and off, the blocks become saturated. The reason for this is that in the switching mode, the blocks 11, 12 and 13 are in the saturation point region where the voltage between an emitter and collector is between 0.1 to 0.2 volt. As the blocks 11, 12 and 13 are saturated, it is difficult to control a motor rotating at a low speed since the blocks 11, 12 and 13 immediately indicate the changes of the outputs according to the switching signals.
Hence, the blocks 11, 12 and 13 are configured as shown in FIG. 2 in order that the blocks not be in the saturation point region during the switching operation. FIG. 2 shows a detailed drawing of a block 11 of the blocks 11, 12 and 13 as shown in FIG. 1. Since the blocks 11, 12 and 13 are identically configured, only the block 11 will be described.
An electric potential Vce1 between a collector and emitter of a transistor Q1 of FIG. 2 is found through Equation 1.
Vce1=Vbe2+(R1xc3x97Ir1)xe2x88x92Vbe3=R1xc3x97Ir1xe2x80x83xe2x80x83Equation 1
Referring to Equation 1, Ir1 represents the current flowing to a resistor R1, Vce2 represents an electric potential between a base and emitter of a transistor Q2, and Vbe3 represents an electric potential between a base and emitter of a transistor Q3.
Hence, when adjusting values of the resistor R1, the voltage between an emitter and collector of a transistor Q6 can be set outside the range 0.1 to 0.2 volt, which is the saturation voltage.
However, this conventional saturation protection of the transistor is possible only when output terminals are configured as pnp and npn transistors, and if the output terminals are configured with only the pnp transistors, the transistors cannot be protected from saturation.
It is an object of the present invention to provide a method for a transistor to be protected from saturation regardless of the configuration of the transistor of an output terminal in a driving circuit of a three phase BLDC motor, and thereby be suitable in a system for controlling the motor speed when it rotates slowly.
In one aspect of the present invention, a three phase brushless direct current (BLDC) motor driving circuit comprises a motor that includes a rotor having three phase coils and a plurality of magnetic poles; an inverter that controls directions of a current supplied to the three phase coils according to supplied switching signals and includes a first switch unit including a plurality of transistors each positioned between a voltage source and the three phase coils, and a second switch unit including a plurality of transistors each positioned between the first switch unit and the ground; and an inverter controller that controls operations of the inverter. The three phase BLDC motor driving circuit further comprises a voltage reducing unit coupled to the three phase coils, rectifying a back electromotive force (BEMF) voltage generated in the three phase coils and generating a first voltage, the first voltage being reduced to a first level; a reference voltage unit, positioned between the voltage source and the ground, adjusting the voltage source to be reduced to a second level that is greater than the first level; and a differential amplifier having a first input terminal coupled to an output terminal of the voltage reducing unit, having a second input terminal coupled to an output terminal of the reference voltage unit, and having a third input terminal coupled to the voltage source, and amplifying an output of a corresponding output terminal to an amount equaling the difference between a voltage of the first input terminal and a voltage of the second input terminal, and controlling to make the voltages of the first and second input terminals identical.
The circuit further comprises an error amplifier that compares the voltage supplied through the second switch unit with a set voltage and controls the current supplied to the differential amplifier by using a voltage corresponding to a comparison difference so that the voltage supplied through the second switch unit becomes identical with the set voltage.
The voltage reducing unit performs a half wave rectification and a smoothing operation on the BEMF voltage that is generated in the three phase coil and has a phase difference of 120xc2x0, and reduces the maximum value of the BEMF voltage to an amount of the first level.
The voltage reducing unit comprises a first diode having an anode coupled to a U phase coil; a second diode having an anode coupled to a V phase coil; a third diode having an anode coupled to a W phase coil; a resistor having one end coupled to cathodes of the first, second and third diodes and having another end grounded; and a capacitor, coupled to the resistor in parallel, having one end coupled to an input terminal of the differential amplifier.
The reference voltage unit comprises a plurality of diodes, specifically three static voltage diodes; each coupled to the voltage source in series.
The first level is lesser than the second level, and a difference between the first and second levels is more than a saturation voltage of the transistor.
The differential amplifier comprises first and second pnp transistors, each having an emitter coupled to the voltage source and having a common base; a third pnp transistor having an emitter coupled to a collector of the first pnp transistor, having a collector coupled to an input terminal of a first transistor controller, and having a base coupled to an output terminal of a half wave rectifier; and a fourth pnp transistor having an emitter coupled to the collector of the first pnp transistor, having a collector coupled to an input terminal of a second transistor controller, and having a base coupled to the output terminal of the reference voltage unit.